1. Field of the Invention
The present invention relates to a nonvolatile memory structure and, more particularly, to a nonvolatile single-poly memory cell structure.
2. Description of the Prior Art
Non-volatile memory (NVM) is a type of memory that retains information it stores even when no power is supplied to memory blocks thereof. Some examples include magnetic devices, optical discs, flash memory, and other semiconductor-based memory topologies. According to the programming times limit, non-volatile memory devices are divided into multi-time programmable (MTP) memory and one-time programmable (OTP) memory. MTP is multi-readable and multi-writable. For example, EEPROM and flash memory are designedly equipped with some corresponding electric circuits to support different operations such as programming, erasing and reading. OTP functions perfectly with electric circuits with mere programming and reading functions. Electric circuits for erasing operation are not required. Therefore, the electric circuits for OTP are much simpler than those for the MTP to minimize the production procedures and cost.
MTP memory units and OTP memory units share similar stacking structures. Structurally speaking, current floating gate NVMs are divided into double-poly non-volatile memory and single-poly non-volatile memory. In the double-poly non-volatile memory, it usually comprises a floating gate for the storage of charges, an insulation layer (an ONO composite layer of silicon oxide/silicon nitride/silicon oxide for example), and a control gate for controlling the access of data. The operation of the memory unit is based on the principle of electric capacity, i.e. induced charges are stored in the floating gate to change the threshold voltage of the memory unit for determining the data status of “0” and “1.” Because the single-poly non-volatile memory is compatible with regular CMOS process, it is usually applied in the field of embedded memory, embedded non-volatile memory in the mixed-mode circuits and micro-controllers (such as System on Chip, SOC) for example.
As dimensions and tunneling oxide of the memory cell unit continue to shrink, the operation voltages employed when programming the memory cell unit decreases. There is a strong need in this industry to improve the program efficiency of the nonvolatile memory while reduce the write current.